ZH
48MHz Cortex-M0+ 32-bit CPU
Supports single-cycle multiply instructions
128KB Flash and 16KB SRAM
512Bytes OTP
Flexible power management mode
– Auto switching of VBAT backup power
– 1.25μA VBAT mode + RTC + backup register
– 1.55μA Stop mode, CPU + SRAM hold mode
– 2.05μA Stop mode + RTC
– 3.8 μs wake up@Stop mode from flash executor
Power monitoring: supports BOR and PVD
Clock source
– External high-speed clock: 1~32MHz, supports oscillation stop detection
– External low-speed clock: 32.768KHz, supports oscillation stop detection
– Internal high-speed clock: 32MHz, full temperature change ≤ ±2%
– Internal low-power low-speed clock: 32KHz
– Internal multi-speed clock: 65.5 khz ~ 4.192 mhz
– PLL: 5MHz ~ 48MHz
72 IOs, anti-backflow and compatible with 5V communications; up to 20mA for IO with high drive capability
4-channel DMA controller with flexible mapping
11x timers
1x 16-bit 4 channel advanced timer
– 1x 16-bit 4-channel general timers
– 2x 16-bit 2 channel Universal Timers
– 2x 16-bit basic timer
– 1x 16-bit low-power timers, one of which supports orthogonal encoding
– 1x 24-bit SysTick
– 2x watchdogs: IWDG and WWDG
IRTIM supports timers and U(S)ART interconnection for infrared control
Communication interface
– 2x LPUART interfaces, supports wakeup from FIFO and Stop mode
– 4x U(S)ART interfaces, supports SPI master mode
– 2x SPI interfaces, with maximum speed of 16Mbps in master mode and 16Mbps in slave mode
– 2x I2C, supports master and slave modes, 1Mbps Fm+ and wakeup from Stop mode
Information security
– Sm4/AES: supports protection against side channel attacks
– AES algorithm coprocessor
– PUF,TRNG, CRC
– TAMP anti-tamper and backup registers
PCROP code reads out the protected area
LCD supports up to 8COM x 40SEG
– Charge pump mode: strong drive capability, VLCD boost voltage can be higher than VDD and does not varies with VDD; VLCD can be configured in multiple levels up to 5.25V
– On-chip resistor voltage dividing mode: Contrast is adjustable in 16 levels, high and low drive capacity can be switched dynamically, and no external capacitor is required
12-bit 1.14Msps high-precision ADC, capable of measuring signals with high output impedance
2x ultra-low power comparators , rail-to-rail input supported
Built-in reference voltage source VREFBUF, 2.048V, 2.5V,supports output through IO
1x temperature sensor, with maximum error of ±2°C
96-bit unique ID
Built-in Bootloader: supports UART and SPI
SWD debugging
Operating conditions: 1.8V~3.6V, -40°C~85°C
Package: LQFP80/64/48
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